From:                              route@monster.com

Sent:                               Tuesday, June 14, 2016 5:14 PM

To:                                   hg@apeironinc.com

Subject:                          Please review this candidate for: IMS Integration

 

This resume has been forwarded to you at the request of Monster User xapeix03

James Talley  Last updated:  07/22/14

Job Title:  no specified Company:  no specified Rating:  Not Rated Screening score:  no specified Status:  Resume Received Frisco, TX  75035 US Mobile: 2147620816    jwetalley@sbcglobal.net Contact Preference:  Email Quick View Links: Resume Section Summary Section

 

RESUME
Resume Headline: James Talley 2014 - Solutions Architect Resume Value: u8475ykdunhckwy9

 

James W. E. Talley Jr Dallas / Fort Worth, Texas (214)762-0816 | jwetalley@sbcglobal.net | http://www.linkedin.com/pub/james-talley/4/227/a92     Solutions Architect with over 20 years of design and development experience with solutions, systems, and electronic hardware. Exhibits leadership and interpersonal skills with proven results as an analytical problem solver. Hands-on and team oriented. Adept at leading solutions from concept to reality. Competencies include the following:

·               Solutions/Technical Lead ·               Solutions Design/Architecture ·               Solutions Integration and Test	·               Trade Show Demonstrator ·               Systems Architecture ·               HW/Systems Integration		·               FPGA/Digital design ·               Microprocessor Board Design ·               CAE Tools

Technical Skills

 

Technologies:LTE Connected Car, RFID, Content Delivery Networks (CDN), WiFi, IMS, IPTV, Mediaroom,                                           Web Server, Augmented Reality, Cloud Computing, API, Server Virtualization, DSL, Resilient

                                       Packet Ring, Optical Ring Networks, FPGA, Microprocessors

Network Protocols:    SIP, TCP/IP, DHCP, IGMP, HTTP, Ethernet

Tools:  VMware Converter, VSphere, Empirix Hammer Call Analyzer, Wireshark, Smart Bits, Visual Studio, Logic Analyzers, Oscilloscopes, FPGA Design Tools and Simulators

Languages:                 C, VHDL, XML, Assembly language

OS:              iOS, Android, Mac OS, Windows 8/7/Server 2003/XP, VMware ESXi, Linux, Solaris, Unix

 

Patents / Key Accomplishments

 

·               United States Patent no. US 7,760,637 B1 issued July 20, 2010 “System and method for implementing flow control with dynamic load balancing for single channelized input to multiple outputs”

·               United States Patent no. US 7,693,081 B1 issued April 6, 2010 “Integrated IP DSLAM test monitor”

·               Solutions Lead for the Mobile Enhanced Reality solution that earned 2^nd place at the CTIA 2009 E-Tech awards for “Mobile Applications & Widgets - Mobile Advertising”.

 

Professional Experience

Alcatel-Lucent, Plano, Texas

      Sr. Solutions Architect, Global Sales & Marketing – Solutions Development Team (2006 – Present)

Position involves in designing innovative solutions that help assist service providers in evaluating and validating next generation services. Responsibilities include serving as Solutions lead, providing solutions architecture, feature               definition, use-case creation, providing technical direction to the SW development team, technical demonstrations at

key industry trade shows, demo installations, demo script writing and demonstration training.

 

·   Architected a Cloud-based LTE Connected Car solution and managed the vehicle customization efforts for the solution on time and under budget.

·   Deployed solutions and train technical presenters for demonstration of service concepts in the Executive Briefing Centers in the US and Worldwide. 

·   Provided successful proof of concept demonstrations to key executives of Alcatel-Lucent, Time Warner Cable, Chorus, China Mobile, Verizon, AT&T, Sprint, CBS, and ABC

·   Collaborating with external vendors led effort to design and integrate RFID inventory management system for a Cloud-based Connected Service Vehicle and managed vehicle customization efforts on time and under budget.

·   Provided key demonstration that led to further engagements with Chorus New Zealand to participate in a market trial of a Connected Technician/Vehicle solution for a subset of fleet vehicles.

·   Led the effort to install and provide demonstration training of an LTE Connected Service Vehicle for China Mobile at the Asia Mobile Expo Trade show 2013 in Shanghai.

·   Collaborated with a development team in France and the US on the development efforts of a Mobile Augmented Reality solution that featured image recognition over IMS video call.

·   Led and performed successful lab trial integrations of service concept solutions with AT&T and Verizon.

·   Directed the effort to architect, procure and install a local IMS installation for the ETI lab on time and under budget.  Guided several installation teams to install and turn up an IMS system within 3 months.

·   Integrated and performed firmware updates on Motorola Mediaroom Set Top Boxes in the ETI IPTV Lab.

·   Installed and configured Mediaroom IPTV Personal Servers for solution prototypes also installed and configured Network Management Systems for Residential Gateways and IP-DSLAMs in the ETI IPTV Lab.

 

 

James W. E. Talley Jr | Page Two

 

Sr. Electrical Design Engineer, Bell Labs (2000 – 2006)

Researched testing methodologies, developed testing and measurement tools, prototyped systems and developed hardware in the area of optical rings, Ethernet, packet rings and video over DSL. Responsibilities include providing               system               level architecture and HW/SW requirements.

 

·   Researched video streaming mechanisms. Developed and defined testing methodologies to measure video traffic performance of an IP-DSLAM Video Service Module emulator. Methodologies resulted in US Patent.

·   Developed a PC based multi-port, multi-threaded packet analyzer tool that analyzed: TCP/IP Traffic, Bit-rate, Group of Picture, Frame Timing, and Frame Drops.

·   Designed FPGA circuits that provided ingress scheduling of Ethernet frames onto a SPI-4.2 Interface. Provided other FPGA circuits that switched and parsed Ethernet Frames, and performed packet conversions between RPR and Ethernet.

·   Designed and integrated packet scheduling FPGA that scheduled packets from 3 sets of ingress queues with two levels of priorities onto the dual optical bus.  Design resulted in US Patent.

·   Systems Development Team leader for the Tera-bit IP optical router prototype.  Provided project leadership for a team of five engineers.

·   Developed a packet sniffer tool that monitors proprietary video streams to determine monitoring techniques for video. Design resulted with an invention disclosure.

 

Electrical Design Engineer, Optical Networks Division (1993 – 2000)

Designed, integrated and tested microprocessor based hardware modules for the control platforms of SONET optical networking systems.  Additional duties include: Designing, testing and integrating Digital Logic FPGA based               microprocessor peripheral supporting circuits.

 

·   Designed, integrated and tested FPGA for an Optical Gateway Multiplexer that provided two burst-TDM channels for communication of protection switching to all data path modules.

·   Designed, integrated and tested Interface Server module that provided customer specific SONET overhead interfaces and user interfaces for an Optical Gateway Multiplexer.  Designed FPGAs for system glue and processor-support.

·   Designed, integrated and tested WDM motherboard for an Optical Amplifier.  Six month design cycle with 25% design reuse. 

·   Designed, integrated and tested MC68360 CPU based single board computer that provided control for data-path modules in an Optical Amplifier and an Optical Gateway Multiplexer.

·   Designed, integrated and tested Optical Shelf Processor Circuit Module for an Optical Amplifier.  Designed two FPGAs for system glue and processor-support.

 

Education / Certifications

 

·               Master of Science, Electrical Engineering, University of Texas at Dallas, Richardson, Texas

·               Bachelor of Science, Electrical Engineering, Tennessee State University, Nashville, Tennessee

·                        State of Tennessee State Board of Architectural and Engineering Examiners, "E.I.T. Certificate" June 1992

 

Invention Disclosures

 

·         Co-inventor to Invention Disclosure case no. 139482 “Integrated DSLAM IPTV Test Monitor”

·         Co-inventor on Invention Disclosure case no. 139474 “Method for Testing an IPTV Network”

·         Co-inventor on Invention Disclosure case no. 139453 “Vsniff Versatile Sniffer: Data Traffic Analyzer”

 

Professional Affiliations / AWARDS

 

·                        Fathers.com-Watch D.O.G.S: 2012-2014 Top Dog Coordinator for Sem Elementary School, Frisco, Texas

·                        Frisco Football League: 2009-2011,2013 Assistant Football Coach, USA Tackle Football Certified.

·                        Toastmasters: Member 2005-2008, Competent Communicator and Competent Leader Award 2007

·                        Alcatel’s “Achievement Award” 2000, “Hi-Five Achievement Award” 2000, "Quality Cup" 1997

·                        "Home Town Hero" KDFW Fox 4 TV February 1998 for the NSBE Math and Science Tutoring Program at Dallas ISD

·                        National Society of Black Engineers-Alumni Extension: Dallas Chapter President 1996, Vice-President 1995